Standard

Analytical modeling of matrix–vector multiplication on multicore processors. / Gareev, Roman A.; Akimova, Elena N.
в: Mathematical Methods in the Applied Sciences, Том 45, № 15, 01.10.2022, стр. 8769-8799.

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Harvard

Gareev, RA & Akimova, EN 2022, 'Analytical modeling of matrix–vector multiplication on multicore processors', Mathematical Methods in the Applied Sciences, Том. 45, № 15, стр. 8769-8799. https://doi.org/10.1002/mma.7045

APA

Vancouver

Gareev RA, Akimova EN. Analytical modeling of matrix–vector multiplication on multicore processors. Mathematical Methods in the Applied Sciences. 2022 окт. 1;45(15):8769-8799. doi: 10.1002/mma.7045

Author

Gareev, Roman A. ; Akimova, Elena N. / Analytical modeling of matrix–vector multiplication on multicore processors. в: Mathematical Methods in the Applied Sciences. 2022 ; Том 45, № 15. стр. 8769-8799.

BibTeX

@article{e26f3fb12ef04e8ea62a2fea1cc4a162,
title = "Analytical modeling of matrix–vector multiplication on multicore processors",
abstract = "The efficiency of matrix–vector multiplication is of considerable importance. No current approaches can optimize this sufficiently well under severe time constraints. All major existing methods are based on either manual-tuning or auto-tuning and can therefore be time-consuming. We introduce an alternative model-driven approach, which is used to map the implementation of matrix–vector multiplication to a target architecture and analytically obtain its parameters. The approach yields the performance that is competitive with optimized Basic Linear Algebra Subprograms (BLAS)-like dense linear algebra libraries without the need for manual-tuning or auto-tuning. Our method provides competitive performance across hardware architectures and can be utilized to obtain single-threaded and multi-threaded implementations on multicore processors. We expect that this approach allows the community to progress from valuable engineering solutions to techniques with a broader application. {\textcopyright} 2021 John Wiley & Sons, Ltd.",
author = "Gareev, {Roman A.} and Akimova, {Elena N.}",
year = "2022",
month = oct,
day = "1",
doi = "10.1002/mma.7045",
language = "English",
volume = "45",
pages = "8769--8799",
journal = "Mathematical Methods in the Applied Sciences",
issn = "0170-4214",
publisher = "John Wiley & Sons Inc.",
number = "15",

}

RIS

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AU - Gareev, Roman A.

AU - Akimova, Elena N.

PY - 2022/10/1

Y1 - 2022/10/1

N2 - The efficiency of matrix–vector multiplication is of considerable importance. No current approaches can optimize this sufficiently well under severe time constraints. All major existing methods are based on either manual-tuning or auto-tuning and can therefore be time-consuming. We introduce an alternative model-driven approach, which is used to map the implementation of matrix–vector multiplication to a target architecture and analytically obtain its parameters. The approach yields the performance that is competitive with optimized Basic Linear Algebra Subprograms (BLAS)-like dense linear algebra libraries without the need for manual-tuning or auto-tuning. Our method provides competitive performance across hardware architectures and can be utilized to obtain single-threaded and multi-threaded implementations on multicore processors. We expect that this approach allows the community to progress from valuable engineering solutions to techniques with a broader application. © 2021 John Wiley & Sons, Ltd.

AB - The efficiency of matrix–vector multiplication is of considerable importance. No current approaches can optimize this sufficiently well under severe time constraints. All major existing methods are based on either manual-tuning or auto-tuning and can therefore be time-consuming. We introduce an alternative model-driven approach, which is used to map the implementation of matrix–vector multiplication to a target architecture and analytically obtain its parameters. The approach yields the performance that is competitive with optimized Basic Linear Algebra Subprograms (BLAS)-like dense linear algebra libraries without the need for manual-tuning or auto-tuning. Our method provides competitive performance across hardware architectures and can be utilized to obtain single-threaded and multi-threaded implementations on multicore processors. We expect that this approach allows the community to progress from valuable engineering solutions to techniques with a broader application. © 2021 John Wiley & Sons, Ltd.

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U2 - 10.1002/mma.7045

DO - 10.1002/mma.7045

M3 - Article

VL - 45

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EP - 8799

JO - Mathematical Methods in the Applied Sciences

JF - Mathematical Methods in the Applied Sciences

SN - 0170-4214

IS - 15

ER -

ID: 30834578